As is well known, an integrated circuit is formed on a small, substantially planar, piece of semiconductor, such as silicon, known as a die. The die, in addition to the circuit formed therein, includes contact pads on the top surface at the periphery thereof. The die is enclosed in a package which generally includes a lead frame having a plurality of inner leads and outer leads. Each inner lead is integrally connected to a corresponding outer lead. The outer leads extend externally from the package while the inner leads are internally connected to corresponding contact pads to permit the integrated circuit die to be coupled to the outside world. Before an integrated circuit is ready for use, a frame interconnection member and a dam bar which interconnects all the outer leads has to be trimmed off to singulate each outer lead. The outer leads are then formed to the desired configuration, such as a gull-wing shape, so that the integrated circuit package is ready to be mounted on a printed circuit board (PCB). It is more desirable to perform a multi-stage trim and form operations on the outer leads, that is, the trimming and forming operations are performed sequentially rather than simultaneously. It is known that a sequential operation results in better precision and control of the forming process.
Typically, a plurality of contact pads on the die and a corresponding plurality of leads on the lead frame are reserved for ground connection. Similarly, a plurality of contact pads and a corresponding plurality of leads are reserved for supply voltage connections. Such ground and supply voltage connections are required to permit an operating power supply voltage to be applied to the die.
For less expensive, high volume, integrated circuits, the die has been encapsulated in an insulating housing referred to as a plastic quad flat pack (PQFP) through transfer molding and wherein the die is conductively bonded to a metallic surface called a die paddle. The die paddle is employed to distribute the power supply voltage applied to the power supply leads and die contact pads. The ground connection for the die is established only through the ground leads and contact pads. Such grounding is generally sufficient in integrated circuits that are generally low performance wherein a minimal amount of internal device switching occur in the operation of such integrated circuits.
There are, however, a significant number of high performance hermetic integrated circuits such as microprocessor integrated circuits wherein a high degree of internal device switching occurs. Such high performance hermetic integrated circuits generally require a better ground than the aforementioned PQFP. This results because the device switching in high performance hermetic integrated circuits causes voltage transients which in turn cause what is known as ground bounce wherein the ground voltage is not at zero volts but rather at some finite voltage.
Integrated circuits, such as microprocessor integrated circuits, are generally able to operate properly if the ground bounce is maintained below an acceptable level, such as, for example, 1 volt. When the ground bounce is above the acceptable level, threshold levels of the switching devices can be adversely affected causing the high performance hermetic integrated circuits to operate improperly.
In order to cope with the ground bounce problem in high performance hermetic integrated circuits, such as microprocessor integrated circuits, various measures have been previously taken to maintain the ground bounce below the acceptable limit, of, for example, 1 volt. The main objective is to reduce the inductance of the ground connection. Typically, at least one ground plane is included in the package.
For example, Newman U.S. Pat. No. 5,068,708, assigned to the assignee of the present application, teaches a plastic encapsulated integrated circuit structure comprising a multilayer ground plane assembly bonded to a lead frame with an integrated circuit die bonded to the composite assembly.
However, even though this multilayer ground plane assembly works effectively for its intended purpose, the incorporation of a ground plane increases the cost of the package. Furthermore, plastic encapsulation used in a typical PQFP is non-hermetic and therefore susceptible to penetration of moisture and contaminants from the environment which could lead to earlier failure of the integrated circuit die. On the other hand, a package that provides a hermetic enclosure to the die will be able to avoid such penetration and thus making the package desirable for high reliability requirement, such as in military application.
An integrated circuit packages which is known to provide a hermetic enclosure for the die is referred to as a ceramic quad flat pack, or CERQUAD. There are two types of CERQUAD. The first one is referred to as laminated CERQUAD which is formed from a laminated ceramic base containing the die and encapsulated by a kovar lid sealed to the laminated base using gold/tin preform. In order to reduce ground bounce in such packages, multiple laminations of ceramic and conductive ground planes are used below the integrated circuit die to sink current and disperse the transient voltages and currents. While such packages are hermetic and are capable of maintaining the ground bounce below the acceptable limits, such as 1 volt, the cost of such packaging has been on the order of ten times the cost of the previously mentioned PQFP without a ground plane.
The other CERQUAD is referred to as a glass-sealed CERQUAD. A glass-sealed CERQUAD comprises a pressed ceramic base where the die is positioned. A glass, typically made from lead-zinc-borated glasses, is used to form a hermetic seal between a pressed ceramic cap and the pressed ceramic base. A lead frame with predetermined patterns of inner lead and integrally connected outer lead is sandwiched between the base and the cap to allow for connection from the die contact pads to the corresponding inner leads, which provide further connection to the outside world through the outer leads. Since a glass-sealed CERQUAD does not require lamination of multilayer ceramic, it is able to provide hermetic enclosure of the integrated circuit die at a substantially lower costs than an equivalent laminated CERQUAD.
A glass-sealed CERQUAD without a ground plane, like a PQFP without a ground plane, is unable to handle high performance hermetic integrated circuits due to ground bounce since the ground connections for the die is likewise established only through the ground leads. Introducing a ground plane to the glass-sealed CERQUAD is possible to reduce the ground bounce below the acceptable limit, of, for example, 1 volt. However, even though the cost of a glass-sealed CERQUAD with a ground plane is substantially lower than that of a laminated CERQUAD, a glass-sealed CERQUAD with ground plane still cost around three times that of one without a ground plane.
Moreover, the PQFP may further be configured into a package known as a "TapePak" structure ("TapePak" is a registered trademark of National Semiconductor Corporation), by having a molded plastic carrier ring that substantially surrounds and is spaced apart from the die encapsulation to support the outer leads for providing mechanical stability and testability. In the "TapePak" structure, a plurality of tie bar members extend integrally from the die paddle to a plurality of frame tab members. Each frame tab members includes at least one positioning holes for positioning. After the outer portion of the frame interconnection member is trimmed off to singulate the outer leads, the encapsulated die paddle remains secured to the molded plastic carrier ring by the tie bar members and the frame tab members. Thereafter, the outer leads can be formed into the desired lead configuration, using the positioning holes on the frame tab members for positioning of the encapsulated die on the forming stage. Thus a preferred multi-stage trim and form operation can be achieved.
In the case of a glass-sealed CERQUAD, no die paddle is available since the die is mounted directly onto the base. Therefore, it is generally not possible to provide tie bar members to allow for multi-stage trim and form operation of the outer leads. Accordingly, the trim and form operation of the outer leads have to be done simultaneously which lead to reduction in precision and control of the forming process. Besides, since the trim and form process is different, a integrated circuit manufacturer who produces PQFP and glass-sealed CERQUAD with the same package outline will have to have two different sets of trim and form tools to accomplish the trim and form process. This is undesirable because it increases manufacturing cost due to extra equipment and factory space.
It would, therefore be desirable to provide an improved, low cost, integrated circuit package having a reduced ground inductances, sufficiently low to maintain the ground bounce within acceptable limit for high performance hermetic integrated circuits, and suitable for use in high reliability applications. Furthermore, it would be desirable to incorporate tie bar members and frame tab members into such a package in the "TapePak" configuration to allow for multi-stage trim and form of the outer leads so that it can use the same trim and form equipment and process set up for a "TapePak" PQFP